Research in multi-carrier modulation has grown tremendously in recent years due to the demand for high-speed data transmission over fading channels (e.g. power line, wireless, etc.) where inter-symbol interference (ISI) can occur. Instead of employing single-carrier modulation with a very complex adaptive equalizer, the channel is typically divided into N sub-channels that may be essentially ISI-free independent Gaussian channels.
The so-called “bit loading” is a widely employed technique in multi-carrier systems to efficiently assign bits to each carrier depending on the signal-to-noise ratio (SNR). In general, bit loading techniques allow transmitting a higher number of bits over the carriers where the SNR is higher and a lower number of bits over the carriers where the SNR is lower.
To better understand the field of application, reference is made to the so-called HomePlug AV (HPAV) communication system, though any skilled reader will appreciate that the proposed approach may be applied also to systems different from HPAV, that is herein illustrated purely as a non-limiting example.
HomePlug® (See, for example, http://www.homeplug.org/home/), an industrial organization that comprises more than 70 companies, was formed in 2000 to develop and standardize specifications for home networking technology using existing power line wiring. The last generation technology of HomePlug®, called HomePlug AV (HPAV) (See for example, HomePlug® PowerLine Alliance, “HomePlug AV baseline specification,” Version 1.1, May 2007—“HomePlug AV white paper,” http://www.homeplug.org/tech/whitepapers/HPAV-White-Paper 050818.pdf), is a communication system where the proposed bit loading algorithm can be applied.
In FIG. 1, the HPAV physical layer that is the basis of analysis is shown. As explained in HomePlug® PowerLine Alliance, “HomePlug AV baseline specification,” Version 1.1, May 2007, the input bits from the medium access control (MAC) are structured by the HPAV transmitter differently depending on whether they are HPAV data, HPAV control information, or HomePlug 1.0 control information. In the present application, for the sake of simplicity, the more common HPAV data format will only be referred to. At the transmitter, the information bits are scrambled and fed into a turbo convolutional encoder with a code rate R. The code rate can be R=½ or, after puncturing, R= 16/21. The coded sequences are then bit-by-bit interleaved and converted into QAM symbols through a bit-mapper. The data symbols (belonging to unit power constellations) are serial-to-parallel-converted for orthogonal frequency division multiplexing (OFDM) modulation. Each OFDM carrier can be differently loaded, depending on the bit loading algorithm, with one of the available modulations: BPSK, QPSK, 8-QAM, 16-QAM, 64-QAM, 256-QAM and 1024-QAM. In HPAV, the OFDM modulation is implemented by using a 3072-point inverse discrete Fourier transform (IDFT). Furthermore, to comply with frequency regulatory bodies it is typically not possible to use of all the carriers. For example, according to United States regulations, only 917 carriers, out of the 1536 carriers from DC to 37.5 MHz, can be employed for useful transmission.
To reduce the complexity of the receiver, a suitable cyclic prefix may be used to remove both ISI and inter-channel interference (ICI). Before an analog front end (AFE) block, which sends the resulting signal to the power line channel, a peak limiter block may be inserted to reduce the peak-to-average power ratio (PAPR). At the receiver the signal after an AFE block is fed to automatic gain control (AGC) and time synchronization blocks. The cyclic prefix is removed and the OFDM demodulation, which is implemented by the 3072-point discrete Fourier transform (OFT), is performed. The following assumptions are made:
i) the cyclic prefix completely eliminates ISI and ICI;
ii) a perfect synchronization is guaranteed, and
iii) the channel is time invariant within each packet.
The output from the OFDM demodulator is sent to a soft-input soft-output (SISO) de-mapper, a de-interleaver, and a turbo convolutional decoder, which, in the approach of the present embodiment, implements the Bahl, Cocke, Jelinek, and Raviv (BCJR) algorithm (See for example, L. R. Bahl, J. Cocke, F. Jelinek, and J. Raviv, “Optimal decoding of linear codes for reducing symbol error rate,” IEEE Trans. On Inform. Theory, vol. 20, pp. 284-287, March 1974) in an improved Max-Log-MAP form (See for example, J. Vogt and A. Finger, “Improving the max-log MAP turbo decoder,” IEEE Elect. Lett., vol. 36, pp. 1937-1939, November 2000). Successively, the bits provided by the decoder are de-scrambled to reconstruct an estimation of the transmitted bits. To complete the description of FIG. 1, the SNR estimate module performs the estimation of the SNR starting from the signal produced by the demodulator and it is input to the bit loading block.
The problem of bit loading has been widely studied in the literature, and it is part of a more general problem that is the possibility of redistributing the power and the bits available over the various carriers, as a function of the SNR, to improve the overall performance of the system.
A milestone method, the “water filling” algorithm (See for example, R. G. Gallager, Information theory and reliable communication, New York, Wiley, 1968), has been known to generate the optimal energy distribution and to achieve the maximum capacity. However, even if it yields the optimal energy distribution, the maximum capacity could be achieved only if an infinite granularity in constellation size is assumed, which is not realizable. For this reason, suboptimal approaches have been studied, such as, for example, in J. A. C. Bingham, “Multicarrier modulation for data transmission: an idea whose time has come,” IEEE Comm. Magazine, pp. 5-14, May 1990, but the proposed approach is very slow for applications that transmit over a large number of carriers and where a high number of bits can be loaded in each symbol. In the past, the loading issue has been analyzed using two main different approaches (See for example, J. Campello, “Optimal discrete bit loading for multicarrier modulation systems,” IEEE Symp. Info. Theory, pp. 193, August 1998), referred to as “bit rate maximization” and “margin maximization”, respectively. The bit rate maximization approach aims at maximizing the overall throughput of the system with a constraint on the transmission power. (See for example, A. Leke and J. M. Cioffi, “A maximum rate loading algorithm for discrete multitone modulation systems,” IEEE Globecom 1997, pp. 1514-1518, November 1997, and B. S. Krongold, K. Ramchandran and D. L. Jones, “Computationally efficient optimal power allocation algorithms for multicarrier communication systems,” IEEE Trans. on Comm., pp. 23-27, Jan. 2000).
The margin maximization approach aims, instead, at minimizing the transmission power with a constraint on the overall throughput of the system. (See for example, P. S. Chow, J. M. Cioffi and J. A. C. Bingham, “A practical discrete multitone transreceiver loading algorithm for data transmission over spectrally shaped channels,” IEEE Trans. on Comm., pp. 773-775, April 1995, R. F. H. Fisher and J. B. Huber, “A new loading algorithm for discrete multitone transmission,” IEEE Globecom 1996, pp. 724-728, November 1996, J. Campello, “Practical bit loading for DMT,” IEEE ICC 1999, pp. 801-805, June 1999, and N. Papandreou and T. Antonakopoulos, “A new computationally efficient discrete bit-loading algorithm for DMT applications,” IEEE Trans. On Comm., pp. 785-789, May 2005). The proposed approaches are based on the possibility of redistributing the power and the bits over the various carriers. Other examples of algorithms where power and bit loading issues are jointly studied can be found in D. Matas and M. Lamarca, “Optimum power allocation and bit loading with code rate constraint,” IEEE SPAWC 2009, pp. 687-691, June 2009, and H. Y. Qing and P. Q. C. M. Jiao, “An efficient bit and power allocation algorithm for multi-carrier systems,” IEEE ICCCAS 2009, pp. 100-103, July, 2009.
On the other hand, communication systems can be subject to regulations that do not allow power allocation. A typical example is the HomePlug AV (HPAV) system, where the algorithms described above cannot be applied. In fact, these systems with uniform (non-adaptive) power allocation are in the field of application of the approach proposed in the present application.
In this case, suitable bit loading algorithms are described in A. M. Wyglinski, F. Labeau, and P. Kabal, “Bit loading with BER-constraint for multicarrier systems,” IEEE Trans. on Wireless Comm., pp. 1383-1387, July 2005, E. Guerrini, G. Dell'Amico, P. Bisaglia and L. Guerrieri, “Bit-loading algorithms and SNR estimates for HomePlug AV,” IEEE ISPLC 2007, pp. 77-82, March 2007, U.S. Patent Application Publication No. 2009/0135934 to Guerrieri et al., and A. Maiga, J.-Y. Baudais and J.-F. Hélard, “Very high bit rate power line communications for home networks,” IEEE ISPLC 2009, pp. 313-318, March 2009.
All these approaches aim at maximizing the overall throughput of the system, guaranteeing, at the same time, that the bit error rate (BER) remains below a given threshold, hereafter referred to as a target BER. In A. M. Wyglinski, F. Labeau and P. Kabal, “Bit loading with BER-constraint for multicarrier systems,” IEEE Trans. on Wireless Comm., pp. 1383-1387, July 2005, and E. Guerrini, G. Dell'Amico, P. Bisaglia and L. Guerrieri, “Bit-loading algorithms and SNR estimates for HomePlug AV,” IEEE ISPLC 2007, pp. 77-82, March 2007, different techniques have been proposed for multi-carrier uncoded systems. However, if applied to a coded system, they do not exploit the error-correction capabilities of the code, which means that the target BER is satisfied with a large margin, but at the expense of a reduction in terms of throughput.
In U.S. Patent Application Publication No. 2009/0135934 to Guerrieri et al., a bit loading algorithm that aims at exploiting the error capability of the turbo code using a metric based on the LLRs is presented. Although the achieved performance is relatively good, the iterative nature of the algorithm implies a high computational complexity. The approach proposed in A. Maiga, J.-Y. Baudais and J.-F. Hélard, “Very high bit rate power line communications for home networks,” IEEE ISPLC 2009, pp. 313-318, March 2009, can be applied to a linear precoded discrete multitone modulation (LP-DMT) system, which implements a combination of multi-carrier and spread spectrum techniques. In the contest of bit loading and turbo code there is still the need of an algorithm that efficiently exploits the error-correction capability of the code, but that has a reduced complexity.